The present invention relates to photocurrent compensation schemes and more specifically to an active photocurrent compensation scheme.
Transient radiation disrupts a circuit by either power supply rail span collapse or false charging or discharging of critical circuit nodes due to large amounts of photocurrent. This photocurrent is directly proportional to dose rate and collection volume (junction area). Supply rail span collapse can be avoided to a certain extent by proper design and layout of the power and ground network.
Circuit nodes most sensitive to photocurrent charging or discharging are those with a large mismatch between N+ to P well and P+ to substrate junction areas. Nodes with more P+ to substrate area will tend to charge to VCC And nodes with more N+ to P well area will tend to charge to GND. Examples of these types of nodes in a memory circuit are: bitlines (much more N+ than P+), I/O lines, preamplifier data read lines, and dynamic NOR or NAND gates.
The easiest way to compensate mismatched nodes is to add the appropriate amount of N+ or P+ junction area to ensure no net photocurrent charges or discharges the node. Unfortunately, this "area compensation" would in some cases double the capacitance on these nodes. Junction area compensation on the bitlines of a 16K memory would add four to six nanoseconds to the access and a large amount of die area would be required.
Thus, it is an object of the present invention to compensate for photocurrents without static area compensation.
Another object of the present invention is to compensate for photocurrents using active devices which do not affect the characteristics of the circuit when photocurrents are not present.
These and other objects are achieved by a photocompensating circuit which includes a current mirror that provides a photocompensating current to a node only when photocurrents are present. In a circuit where the photocurrent associated with the junction area of a first conductivity type is greater by a factor of J than the photocurrent associated with the junction area of a second conductivity type, the junction forms the load of the output leg of the current mirror. The current mirror includes a first and second transistor of the second conductivity type connected to each other to form a current mirror. The second transistor, which is the output transistor, is connected to the node and has a device width K times the device width of the first transistor, which is the input transistor. Thus, the current mirror has an amplification factor of K. A third transistor which forms the load transistor for the input leg of the current mirror is connected to the first transistor. The third transistor has a device width of 1/K times the first conductivity type device width at the node. The device width of the third transistor is also J times the device width of the first transistor. Thus, the current mirror provides a current at the node to compensate for the net photocurrent at the node due to junction photocurrent mismatch.
The transistors may be field effect transistors and the junction area is the drain-to-body junction area. Also, the transistors may be bipolar transistors and the junction area of concern is the collector-base junction area. The circuit may include a clamp connected to the first transistor for maintaining the current mirror off when there is no photocurrent present.
Other objects, advantages and novel features of the present invention will become apparent from the following detailed description of the invention when considered in conjunction with the accompanying drawings.